Order Number DM54LSJ, DM54LSW, DM74LSWM or DM74LSN. See Package Number J20A, M20B, N20A or W20A 2. Download Fairchild Semiconductor DM74LSN pdf datasheet file. DM74LSN Octal D-type Transparent Latches And Edge-triggered Flip-flops DM74LS Details, datasheet, quote on part number: DM74LSN.
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The digitiser data board was designed, developed, fabricated and tested by the author. BANK – signal common to each of the data boards from the control board – pulses low for a period determined by data transfer rate of control board, and changes at twice the rate of FINGER.
The signal fed onto the edge connector is passed directly through the high pass filter.
74LS Datasheet catalog
A daatsheet resistor R5 is in series with the output of the comparator to protect the input of the following stage, since the comparator output switches down to the V rail. The output of the comparator is open collector and is thus virtually isolated from the input terminals. This documentation concerns the 64 channel Digitiser Data Boards designed in The digital signal is finally staticized by U7, 74LS The function of this filter is to block DC signals and to control the overall sensitivity of the integrator.
To describe the operation of the circuit, channel 1 is used as an example. Each comparator package is decoupled from both power rails by 10nF capacitors.
This comprises a 2M resistor datasheeet RA1A, and 0. This is to supplement an incomplete track. During operation there is a potential of mV or less between these two lines. The signal is passed through a 0. This reads data from each board and writes the data to a computer interface along with a count word. The schematic circuit was drawn using OrCAD software.
Nearby C, there are two diodes D1, and D2. Secondly, the component pads adjacent to the ACF packages allow for the addition of a capacitor in parallel to the internal pF. Before each integration commences, the switch is closed to discharge the integration capacitor, C2.
All digital grounds are linked to this plane. Manufacturers of the board were Precision Engineering Products Chesterton Ltd, fm74ls374n will retain the production artwork for a limited time.
The two unused controls are pulled high by resistors R1 and R2. This would reduce the gain. Test Switches There are two switches on the board selected by jumpers. The file is in the same archive, under:.
Refer to the complete schematic diagram at the end of this section. When the operation is complete, the switch is closed for 2us, discharging the capacitor. These boards were developed for use in Pulsar research. This IC is a quad programmable comparator selected for its low and repeatable input offset voltages.
The typical current requirements are:. The integration period is determined by the separate control board. These capacitors are identified on the data board and in the schematic as C through C Full circuit details and user instructions for the control board are in a separate document.
The operation is identical for all 64 channels. There is a separate regulator for the digital Vcc, U An integration is then performed across a precision pF capacitor for a single sample interval. These boards are controlled by one Control Board in the same crate.
This power rail separation is to reduce power born noise. This was required due to the obsolescence of the comparators previously used. They are provided to facilitate board testing. It is a modification to a previous design of There are nine data boards in the crate supplied, thus allowing up to channels to be digitised.
The works reference is:. The shielding is provided by the partial groundplane on the component side of the board.
After testing the data boards out of the crate, it is important to put these switches back to the ‘Normal’ settings, as illustrated in figure 2 below, before reinserting into the crate.
The sign of the output of the integrator is detected by a comparator, the output of which is written onto one bit of a 64 bit data register comprising a D-type latch.
This is made up of a network of tracks over the board.